Design Nand Gate Using Pass Transistor Logic
The NAND and NOR gate comes under the category of Universal Gates. These two gates are called Universal gates as they can perform all the three basic functions of AND, OR and NOT gate.
A NAND Gate is a logic gate that performs the reverse operation of an AND logic gate. It is a blend of AND and NOT gates and is a commonly used logic gate.
The NAND gate has an output that is normally at logic high and only goes to logic low when all of its inputs are at logic high. The Logic NAND Gate is the reverse or complementary design of the AND gate. Through this article on NAND gates, you will learn about the symbol, truth table of two and three input gates, along with the boolean expression, circuit diagram and representation of various other gates using NAND gates.
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NAND Gate Symbol
The NAND gate is AND gate succeeded by NOT gate. Thus one can understand the NAND gate as NOT-AND gate also. A NAND gate constitutes one or more inputs with a single output. The NAND gate is represented by a symbol whose shape matches the AND gate with a circle followed, often identified as an inversion circle . Below is the symbolic representation of the NAND gate.
"NAND gate=Bubbled OR gate"
NAND Gate Truth Table
The output of the NAND gate is always at logic high/"1″ and only goes to logic low/"0″ when all the inputs to the NAND gate are at logic 1. In other words, we can say that the output of the NAND gate always continues true if at least one of its inputs remains false or logic low.
The Boolean expression for a logic NAND gate is represented by a single dot or full stop symbol, ( . ) followed by a line or Overline, ( ‾‾ ) over the expression to imply the NOT or logical negation of the NAND gate. Below is the NAND gate boolean expression for two inputs.
Y=\(\overline{A.B}=\overline{A}+\overline{B}\)
The logic or Boolean expression or the NAND gate is the logical multiplication of the inputs followed by the complement of the obtained output or the logical addition of the complemented inputs. Below is the truth table for the two-input NAND gate.
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3 input NAND Gate
Unlike the two-input NAND gate, the three-input NAND gate has three inputs. The symbolic representation of the three input NAND gate is as follows.
The Boolean expression of the logic NAND gate is represented as the binary operation dot(.).
Where A, B, and C are the inputs and Y is the output.
The\(\ boolean\ \exp ression\ for\ three\ input\ NAND\ gate\ is;\ Y=\overline{A.B.C}\)
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3 input NAND Gate Truth Table
The\(\ number\ of\ output\ combination\ is\ 2^N\ for\ N-inputs\ in\ the\ truth\ \)table
The NAND gate can be cascaded commonly to form any number of individual inputs. There are a total of 8 possible combinations of input NAND Gate. The truth table is as follows:
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NAND Gate Circuit Diagram
A simple two-input logic NAND gate can be constructed using transistors connected together as shown below with the inputs connected directly to the transistor bases. Either of the transistors must be cut-off "OFF" for output to be logic high. This means that if both the inputs are at logic high making both the transistors "ON" the resultant output is low/"0″.
Below is the truth table for better understanding:
| A | B | Q1 | Q2 | Output |
| 0 | 0 | OFF | OFF | 1 |
| 0 | 1 | OFF | ON | 1 |
| 1 | 0 | ON | OFF | 1 |
| 1 | 1 | ON | ON | 0 |
NAND Gate IC
Generally available NAND gate IC's include:
- TTL Logic NAND Gates->74LS00 Quad 2-input, 74LS10 Triple 3-input, 74LS20 Dual 4-input and 74LS30 Single 8-input.
- CMOS Logic NAND Gates-> CD4011 Quad 2-input, CD4023 Triple 3-input and CD4012 Dual 4-input.
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Realization of Basic Gates using NAND Gate
NOT Gate using NAND Gate
AND Gate using NAND Gate
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OR Gate using NAND Gate
\(\begin{array}{l}Inputs\ A\ and\ B\ then\ the\ output\ obtained\ is\ A+B\\\)
\(\overline{A}.\overline{B}\ \rightarrow\overline{\overline{A}.\overline{B}}\ \rightarrow A+B\end{array}\)
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Realization of Universal Gates using NAND Gate
NOR Gate using NAND Gate
\(\begin{array}{l}\overline{A}.\overline{B}\ \rightarrow\overline{\overline{A}.\overline{B}}\\) \(\rightarrow\overline{A+B}\end{array}\)
Learn more about NOT Gate, here.
Realization of Special Purpose gates using NAND Gate
EX-OR Gate using NAND Gate
\(\begin{array}{l}Inputs\ A\ and\ B\ then\ the\ output\ obtained\ is:\\\)
\(\overline{A}.B+A.\overline{B}\end{array}\)
EX-NOR Gate using NAND Gate
\(\begin{array}{l}Inputs\ A\ and\ B\ then\ the\ output\ obtained\ is:\\\)
\(A.B+\overline{A}.\overline{B}\end{array}\)
Shortcut For Realization of Logic Gates Using NAND Gate
You might also be interested in learning more about NOR Gate.
| Number of NAND Gates | Other Gates |
| 1 | NOT Gate |
| 2 | AND Gate |
| 3 | OR Gate |
| 4 | EX-OR Gate |
| 5 | EX-NOR Gate |
Key Points
- NAND gate follows Commutative but does not follow Associative law.
\(\overline{A.\ B}=\overline{B.\ A}\)
- In a multiple-input NAND gate, the unused inputs can be connected in the same way as in an AND gate.
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NAND GATE FAQs
Q.1 What is the difference between NAND and NOR gates?
Ans.1
A NAND gate is similar to a complemented-input AND gate, which basically performs the complement of AND gate output whereas a NOR gate is similar to a complemented-input OR gate which performs the complement of OR gate output.
Q.2 What is the difference between AND and NAND gates?
Ans.2
AND and NAND both are logic gates in basic digital circuits. In Boolean algebra AND and NAND do the same operation but the output in NAND is opposite of an AND gate, i.e NAND gate performs the complement of AND gate outputs.
Q.3 What is the function of the NAND gate?
Ans.3
In digital electronics, a NAND gate is a logic gate that produces an output that is false/logic low/zero only if all its inputs are true; basically, the output of NAND Gate is a complement to that of an AND gate
Q.4 Why is the NAND gate a universal gate?
Ans.4
The NAND gate and the NOR gate can be supposed to be universal gates since combinations of these gates can be used to accomplish any of the basic operations like NOT, AND and OR gates.
Q.5 What is the minimum number of NAND gates used to implement AND gates?
Ans.5
The minimum number of NAND gates used to implement AND gates is 2.
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Design Nand Gate Using Pass Transistor Logic
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